The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2010
Filed:
Jan. 23, 2007
Pavel Poplevine, Foster City, CA (US);
Annie-li-keow Lum, Milpitas, CA (US);
Hengyang (James) Lin, San Jose, CA (US);
Andrew J. Franklin, Santa Clara, CA (US);
Pavel Poplevine, Foster City, CA (US);
Annie-Li-Keow Lum, Milpitas, CA (US);
Hengyang (James) Lin, San Jose, CA (US);
Andrew J. Franklin, Santa Clara, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A 4-transistor non-volatile memory (NVM) cell includes a static random access memory (SRAM) cell structure. The NVM cell utilizes a reverse Fowler-Nordheim tunneling programming technique that, in combination with the SRAM cell structure, allows an entire array to be programmed at one cycle. Equalize transistors are utilized to obtain more uniform voltage on the floating gates after an erase operation. Utilization of decoupling pas gates during a read operation results in more charge difference on floating gates of programmed and erased cells.