The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2010

Filed:

Aug. 23, 2006
Applicant:

Paulus Petrus Franciscus Maria Bruin, Nijmegen, NL;

Inventor:
Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a signal processing arrangement, a digital-to-analog converter (DAC) of the finite impulse response type converts a serial bitstream (BSL) into an analog output signal (AL). The digital-to-analog converter (DAC) comprises at least two current source arrays (CCA, CC A). In a first current source array (CCA), a current definition cell (CD) generates a first basic current, and a plurality of first current copy cells ( . . . , CC, CC, . . . ) provide respective scaled copies of the first basic current to constitute first filter coefficient currents ( . . . , IP, IP, . . . ). In a further current source array (CCA), a further current definition cell (CD) generates a further basic current, and a plurality of current further copy cells (CC, CC, . . . , CC) provide respective scaled copies of the further basic current to constitute further filter coefficient currents (IP, IP, . . . , IP). A switch-and-shift array (XSA) individually passes the respective filter coefficient currents (IP, IP, . . . , IP, IP, . . . , IP) to a signal output (CVC), or to another point (DLD), depending on respective successive bit values in the serial bitstream (BSL).


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