The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2010
Filed:
Nov. 01, 2006
Jitesh Shah, Fremont, CA (US);
Jitesh Shah, Fremont, CA (US);
Integrated Device Technology Inc., San Jose, CA (US);
Abstract
A package substrate () for electrically connecting an integrated circuit () to a printed circuit board () includes a core (), a patterned conductive layer (), a plurality of spaced apart, discrete capacitors (), and an insulating layer (). The patterned conductive layer () is positioned on the core (). The discrete capacitors () are electrically connected to the patterned conductive layer (). The insulating layer () covers the patterned conductive layer () and separates the capacitors (). The capacitors () are positioned to provide a relatively low impedance path for quick access to power to stabilize the voltage delivered to the integrated circuit (), and the capacitors () do not occupy valuable space on the integrated circuit (), and the printed circuit board (). Further, this placement of the capacitor assembly () allows for use of a relatively large number of discrete capacitors () without taking up valuable space from the surface of the package substrate ().