The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2010

Filed:

Jan. 28, 2008
Applicants:

Yuichi Inaba, Ota, JP;

Yutaka Yamada, Ota, JP;

Shigehiro Morikawa, Ora-Gun, JP;

Inventors:

Yuichi Inaba, Ota, JP;

Yutaka Yamada, Ota, JP;

Shigehiro Morikawa, Ora-Gun, JP;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention prevents a wiring layer in a memory region from being exposed to prevent a change in wire resistance and degradation of reliability. A SiOfilm as an etching stopper film which transmits ultraviolet light is formed on pad electrodes and an interlayer insulation film. Then, the SiOfilm on the pad electrodes is etched selectively and the SiOfilm in an EPROM region is left. A silicon nitride film and a polyimide film are then formed on the SiOfilm and on the pad electrodes where the SiOfilm is removed, as a protection film which does not transmit ultraviolet light. The silicon nitride film and the polyimide film on the pad electrodes and in the EPROM region are then selectively removed by etching. Since the SiOfilm functions as an etching stopper at this time, the interlayer insulation film under the SiOfilm is prevented from being etched and a control gate line metal layer is prevented from being exposed.


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