The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2010
Filed:
Mar. 14, 2008
Tuyet Ngoc Simmons, Monte Sereno, CA (US);
Madan Patra, Santa Clara, CA (US);
Prasad Rau, Campbell, CA (US);
Tuyet Ngoc Simmons, Monte Sereno, CA (US);
Madan Patra, Santa Clara, CA (US);
Prasad Rau, Campbell, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method and apparatus is provided to utilize the configurability of a programmable logic device (PLD), so as to reduce the complexity of special test equipment (STE) fixtures that are required to test the PLD. The output drivers of certain I/O buffers of the PLD that are not under test may be configured to exhibit a particular impedance magnitude. The impedance magnitude of the output drivers that are not under test may then be used to supply the reference impedance that is required by the digitally controlled impedance (DCI) controllers of the I/O buffers that are under test. The DCI controllers may then correctly configure the impedance magnitude of the respective I/O buffers under test, so as to test the functionality of the controlled impedance buffers for I/O standards that require controlled impedance.