The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2010

Filed:

Mar. 02, 2004
Applicants:

Brian T. Brunn, Austin, TX (US);

Stephen D. Anderson, Minnetonka, MN (US);

Inventors:

Brian T. Brunn, Austin, TX (US);

Stephen D. Anderson, Minnetonka, MN (US);

Assignee:

XILINX, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 5/159 (2006.01);
U.S. Cl.
CPC ...
Abstract

Bit-Edge Zero Forcing Equalizer. A novel solution is presented by which a BE-ZFE (Bit-Edge Zero Forcing Equalizer) is employed to drive an error term within a data signal to an essentially zero value. This new BE-ZFE looks at values of data that occur at the bit edges of a data signal and drives the associated error term to zero. The new BE-ZFE is appropriately implemented within communication systems that are phase (or jitter) noise limited. Some examples of such communication systems include high-speed serial links one type of which serviced using a SERDES (Serializer/De-serializer) where data that is originally in a parallel format is serialized into a serial data stream and then subsequently de-serialized back into a parallel data stream.


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