The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2010
Filed:
Dec. 13, 2006
Takashi Nagao, Ashigarakami-gun, JP;
Yukio Kumazawa, Ashigarakami-gun, JP;
Youichi Isaka, Ashigarakami-gun, JP;
Takashi Igarashi, Shinagawa-ku, JP;
Yusuke Sugimoto, Shinagawa-ku, JP;
Kazuyuki Itagaki, Shinagawa-ku, JP;
Junichi Kaneko, Kawasaki, JP;
Takashi Nagao, Ashigarakami-gun, JP;
Yukio Kumazawa, Ashigarakami-gun, JP;
Youichi Isaka, Ashigarakami-gun, JP;
Takashi Igarashi, Shinagawa-ku, JP;
Yusuke Sugimoto, Shinagawa-ku, JP;
Kazuyuki Itagaki, Shinagawa-ku, JP;
Junichi Kaneko, Kawasaki, JP;
Fuji Xerox Co., Ltd., Tokyo, JP;
Fujifilm Corporation, Tokyo, JP;
Abstract
An image processing device including a storage section, a parallel processing controller, a sequential processing controller, and a selection section which selectively operates the two control sections. The parallel processing controller connects one or more of the image processing modules such that first buffer modules are connected at least one of preceding and following each image processing module, to formulate a first image processing section, and controls such that individual image processing modules perform image processing in parallel with one another. The first buffer modules perform exclusive access control. The sequential processing controller connects one or more of the image processing modules such that second buffer modules are connected at least one of preceding and following each image processing module, to formulate a second image processing section, and controls such that the individual image processing modules perform image processing sequentially. The second buffer modules do not perform exclusive access control.