The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2010

Filed:

Apr. 06, 2007
Applicants:

Yiliang Wu, Mississauga, CA;

Beng S. Ong, Mississauga, CA;

Alphonsus Hon-chung NG, North York, CA;

Inventors:

Yiliang Wu, Mississauga, CA;

Beng S. Ong, Mississauga, CA;

Alphonsus Hon-Chung Ng, North York, CA;

Assignee:

Xerox Corporation, Norwalk, CT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/73 (2006.01); H01L 29/735 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
Abstract

An ambipolar transistor, including a p-type semiconductor region and an n-type semiconductor region near the p-type semiconductor region. Also a first terminal and second terminal contact both the p-type semiconductor region and the n-type semiconductor region. Furthermore, the p-type semiconductor region and the n-type semiconductor region substantially do not overlap each other. A method of manufacturing an ambipolar transistor is also disclosed, including forming a p-type semiconductor region, forming an n-type semiconductor region near the p-type semiconductor region, forming a first terminal contacting both the p-type semiconductor region and n-type semiconductor region, forming a second terminal contacting both the p-type semiconductor region and n-type semiconductor region; and wherein the p-type semiconductor region and the n-type semiconductor region substantially do not overlap, and have substantially no interfacial area.


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