The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 2010
Filed:
Sep. 27, 2007
Gregory J. Miller, Broomfield, CO (US);
Carl H. Carmichael, San Jose, CA (US);
Chen Wei Tseng, Longmont, CO (US);
Gregory J. Miller, Broomfield, CO (US);
Carl H. Carmichael, San Jose, CA (US);
Chen Wei Tseng, Longmont, CO (US);
XILINX, Inc., San Jose, CA (US);
Abstract
Various approaches for generating an implementation of an electronic circuit design are disclosed. In one approach, a software portion of the design is compiled into software that is executable by a hard processor disposed on a single semiconductor chip with resources of an programmable logic device (PLD). A first synthesized version of a hardware portion of the design is generated for the PLD. A synthesized memory scrubber having an empty block for an address counter is generated, as well as a triple modular redundant (TMR) address counter. The memory in the first synthesized version of the hardware portion of the design is replaced with the memory scrubber, and a complete set of netlists is generated, including a TMR hardware portion of the design and a single instance of the synthesized memory scrubber. A configuration bitstream is generated from the complete set of netlists and stored for later use.