The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2010

Filed:

Aug. 25, 2006
Applicants:

Thomas B. Brightman, North Hampton, NH (US);

Andrew D. Funk, Boxford, MA (US);

David J. Husak, Windham, NH (US);

Edward J. Mclellan, Holliston, MA (US);

Andrew T. Brown, Fort Collins, CO (US);

John F. Brown, Wellesley, MA (US);

James A. Farrell, Harvard, MA (US);

Donald A. Priore, Maynard, MA (US);

Mark A. Sankey, Acton, MA (US);

Paul Schmitt, Princeton, MA (US);

Inventors:

Thomas B. Brightman, North Hampton, NH (US);

Andrew D. Funk, Boxford, MA (US);

David J. Husak, Windham, NH (US);

Edward J. McLellan, Holliston, MA (US);

Andrew T. Brown, Fort Collins, CO (US);

John F. Brown, Wellesley, MA (US);

James A. Farrell, Harvard, MA (US);

Donald A. Priore, Maynard, MA (US);

Mark A. Sankey, Acton, MA (US);

Paul Schmitt, Princeton, MA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit () for use in processing streams of data generally and streams of packets in particular. The integrated circuit () includes a number of packet processors (), a table look up engine (), a queue management engine () and a buffer management engine (). The packet processors () include a receive processor (), a transmit processor () and a risc core processor (), all of which are programmable. The receive processor () and the core processor () cooperate to receive and route packets being received and the core processor () and the transmit processor () cooperate to transmit packets. Routing is done by using information from the table look up engine () to determine a queue () in the queue management engine () which is to receive a descriptor () describing the received packet's payload.


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