The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2010

Filed:

May. 30, 2007
Applicants:

Antony Cleitus, Cork, IE;

Hiroo Matsue, Yokohama, JP;

Tomonao Kikuchi, Fujisawa, JP;

Shigeru Tokita, Yokohama, JP;

Inventors:

Antony Cleitus, Cork, IE;

Hiroo Matsue, Yokohama, JP;

Tomonao Kikuchi, Fujisawa, JP;

Shigeru Tokita, Yokohama, JP;

Assignee:

Opnext Japan, Inc., Yokohama-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); G06F 5/06 (2006.01); G06F 1/04 (2006.01); G01F 1/12 (2006.01); G06F 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A master station includes a group of circuits for performing an optimization method. In such a system, the optimization is achieved by adjusting the pull-up resistance and by setting the best possible clock frequency to ensure that data/clock high and low voltage levels are within predetermined specifications. An optimization procedure is performed in a calibration phase invoked by a user or a system whenever a change is introduced to the system, such as addition or deletion of slave stations, a change of data/clock lines, or a change that may affect on the electrical and timing characteristics of the two-wire communication system.


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