The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 05, 2010
Filed:
Feb. 18, 2008
George M. Braceras, Essex Junction, VT (US);
Steven H. Lamphier, Colchester, VT (US);
Harold Pilo, Underhill, VT (US);
Vinod Ramadurai, South Burlington, VT (US);
George M. Braceras, Essex Junction, VT (US);
Steven H. Lamphier, Colchester, VT (US);
Harold Pilo, Underhill, VT (US);
Vinod Ramadurai, South Burlington, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system for integrating dynamic leakage reduction with a write-assisted SRAM architecture includes power line selection circuitry associated with each column of one or more SRAM sub arrays, controlled by a selection signal that selects the associated sub array for a read or write operation, and by a column write signal that selects one of the columns of the sub arrays. The power line selection circuitry locally converts a first voltage, corresponding to a cell supply voltage for a read operation, to a second lower voltage to be supplied to each cell selected for a write operation, as to facilitate a write function. The power line selection circuitry also locally converts the first voltage to a third voltage to be supplied to power lines in unselected sub arrays, the third voltage also being lower than the first voltage so as to facilitate dynamic leakage reduction.