The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2010

Filed:

Aug. 23, 2007
Applicants:

Hayg-taniel Dabag, Bochum, DE;

Dongwon Seo, San Diego, CA (US);

Manu Mishra, San Diego, CA (US);

Inventors:

Hayg-Taniel Dabag, Bochum, DE;

Dongwon Seo, San Diego, CA (US);

Manu Mishra, San Diego, CA (US);

Assignee:

QUALCOMM, Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

An output stage includes two transistors (switching transistor and biasing transistor) coupled in series in a pullup current path between a VDDA node and an output node, and also includes two transistors (switching transistor and biasing transistor) coupled in series in a pulldown current path between the output node and a ground node. Providing the biasing transistors reduces the maximum voltage dropped across the transistors, thereby allowing the transistors to have lower breakdown voltages than VDDA. An adaptive biasing circuit adjusts the gate voltage on a biasing transistor based on the output node voltage. If the output voltage is in a midrange, then the gate voltage is set farther away from a rail voltage in order to reduce voltage stress. If the output voltage is in a range closer to the rail voltage, then the gate voltage is set closer to the rail voltage, thereby facilitating rail-to-rail output voltage swings.


Find Patent Forward Citations

Loading…