The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 05, 2010
Filed:
Jun. 26, 2007
Dipankar Bhattacharya, Macungie, PA (US);
Gregg R. Harleman, Jim Thorpe, PA (US);
Makeshwar Kothandaraman, Whitehall, PA (US);
John C. Kriz, Palmerton, PA (US);
Bernard L. Morris, Emmaus, PA (US);
Dipankar Bhattacharya, Macungie, PA (US);
Gregg R. Harleman, Jim Thorpe, PA (US);
Makeshwar Kothandaraman, Whitehall, PA (US);
John C. Kriz, Palmerton, PA (US);
Bernard L. Morris, Emmaus, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A compensated buffer circuit operative in one of at least a first mode and a second mode includes a plurality of output blocks and a plurality of predrivers, each of the predrivers having an output connected to an input of a corresponding one of the output blocks. Respective outputs of the output blocks are connected together and form an output of the buffer circuit. The output blocks are arranged in a sequence and are binary weighted such that a drive strength of a given one of the output blocks is about twice as large as a drive strength of an output block immediately preceding the given output block. Each of the predrivers selectively enables the corresponding output block connected thereto as a function of a control signal supplied to the predriver for compensating the buffer circuit for PVT variations to which the buffer circuit may be subjected. The respective control signals supplied to the predrivers collectively represent a binary code word, the binary code word in the second mode being equivalent to an arithmetic shift of the binary code word in the first mode.