The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2009

Filed:

Jun. 29, 2006
Applicants:

Nij Dorairaj, Campbell, CA (US);

Eric M. Shiflet, Boulder, CO (US);

Inventors:

Nij Dorairaj, Campbell, CA (US);

Eric M. Shiflet, Boulder, CO (US);

Assignee:

XILINX, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H03K 17/693 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method, apparatus, and computer readable medium for circuit design for a programmable device is described. In one example, a logical description of a circuit design having static logic and reconfigurable logic is imported into a graphical environment. The circuit design is processed in the graphical environment. In particular, the logical description is floorplanned to locate the static logic and the reconfigurable logic in a floorplan of the programmable device. At least one design rule check (DRC) is performed. A partial reconfiguration implementation of the circuit design is then managed for the programmable device.


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