The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2009
Filed:
Jul. 11, 2005
Vijay P. Adusumilli, San Jose, CA (US);
Vijay P. Adusumilli, San Jose, CA (US);
Atmel Corporation, San Jose, CA (US);
Abstract
A memory circuit and a method of operating a flash or EEPROM device that has two levels of internal cache. A memory device having a memory array, sense amplifiers, a data register, cache, an input-output circuit, and a control logic circuit is configured to output data while simultaneously reading data from the memory array to the data register or simultaneously copying data from the data register to a first level of internal cache. In addition, the memory device is configured to output data while simultaneously writing data from the data register to the memory array.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile