The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2009
Filed:
Oct. 17, 2006
Masayuki Kato, Yokkaichi, JP;
Seiji Takahashi, Yokkaichi, JP;
Masahiko Furuichi, Yokkaichi, JP;
Isao Isshiki, Yokkaichi, JP;
Masayuki Kato, Yokkaichi, JP;
Seiji Takahashi, Yokkaichi, JP;
Masahiko Furuichi, Yokkaichi, JP;
Isao Isshiki, Yokkaichi, JP;
Autonetworks Technologies, Ltd., Mie, JP;
Sumitomo Wiring Systems, Ltd., Mie, JP;
Sumitomo Electric Industries, Ltd., Osaka, JP;
Abstract
After an output signal Sis level-inverted, first and second shorting FETsas a level-inversion inhibiting circuit inhibit level-inversion so that the signal is maintained to the inverted state. Thereafter the inhibition of level-inversion is released, when the signal is subsequently level-inverted at a proper time according to a desired duty ratio of a PWM signal S. Thus chattering can be prevented and thereby a PWM signal Sof a stable duty ratio can be generated, even if the level of a reference signal Sfluctuates due to a noise or the like during vehicle acceleration, for example.