The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2009

Filed:

Mar. 15, 2007
Applicants:

Igor Wojewoda, Tempe, AZ (US);

Brian Boles, Mesa, AZ (US);

Steve Bradley, Phoenix, AZ (US);

Gaurang Kavaiya, Chandler, AZ (US);

Inventors:

Igor Wojewoda, Tempe, AZ (US);

Brian Boles, Mesa, AZ (US);

Steve Bradley, Phoenix, AZ (US);

Gaurang Kavaiya, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 5/00 (2006.01); G06F 13/12 (2006.01); H04L 12/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

Peripheral functions of an integrated circuit device may be pooled and dynamically mapped to available external input-output connections of the integrated circuit device by using a set of configuration registers. To provide system robustness, the configuration registers may implement various levels of write protection, error correction and monitoring circuitry. One or more peripheral output functions may be mapped to one or more external output connections. Not more than one output function may be active at the same time on the same output connection. Outputs and inputs may be mapped to the same external input-output connection with or without the output being controllable for placement into an inactive state, e.g., high impedance or open collector. When the input is required to receive external data over the external input-output connection, the output may be placed into the inactive state.


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