The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2009

Filed:

Apr. 23, 2007
Applicant:

Kazuaki Isobe, Yokohama, JP;

Inventor:

Kazuaki Isobe, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device in which a channel region of MOS transistor is provided not to include a non-flat active region end portion and a manufacturing method thereof is disclosed. According to one aspect, there is provided a semiconductor device comprising a semiconductor substrate, a device isolation separating active region, wherein at least a portion of the device isolation is provided in the semiconductor substrate, and a memory cell including a memory cell transistor that comprises a channel region separated by a slit and constituted of a flat active region alone, a charge storage layer provided on a gate dielectric on the channel region, and a first gate electrode provided on an inter-electrode dielectric so as to cover the charge storage layer, and a select transistor that comprises a second gate electrode provided on the gate dielectric on the active region and electrically connected to a wiring.


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