Multi-level modulation method and system

Abstract

Disclosed is a method and a system for performing N-ary modulation in which bit errors may be reduced against symbol error. A binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, two out of the n bits are allocated for identifying four quadrants of the first phase plane, two out of the remaining (n−2) bits are allocated for identifying four quadrants of the second phase plane. The binary signal of three out of the n bits is converted into two digits of ternary signals (T, T). The ternary signals are mapped to the first and second phase planes with rotational symmetry of 90° or with axial symmetry.