The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2009
Filed:
Apr. 17, 2007
Loren J. Wise, Tempe, AZ (US);
Loren J. Wise, Tempe, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Methods and apparatus are provided for magnetoresistive random access memory (MRAM) bits (') combined with associated drive or sense transistors () to form an integrated MRAM array. The MRAM array has lower electrodes () of the MRAM bits (′) formed substantially directly on a source or drain region (-) of associated drive or sense transistors (), so that the intervening vias () and underlying interconnects layers () of the prior art () can be eliminated. An interconnect layer () is provided above the MRAM bit (′) and transistor () combination () for coupling upper electrodes () of the MRAM bits (′) and other electrodes (----) of the transistors () to other elements of the array. Because the lower electrodes () of the MRAM bits (′) are formed in substantial contact with the source or drain regions (--) of the transistors (), a separate interconnect layer () and/or via () for that purpose is not needed. As a consequence, the MRAM array is more space and process efficient.