The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2009

Filed:

May. 17, 2006
Applicants:

Divya Vijayaraghavan, Mountain View, CA (US);

Michael Menghui Zheng, Fremont, CA (US);

Chong H. Lee, San Ramon, CA (US);

Ning Xue, Fremont, CA (US);

Tam Nguyen, San Jose, CA (US);

Inventors:

Divya Vijayaraghavan, Mountain View, CA (US);

Michael Menghui Zheng, Fremont, CA (US);

Chong H. Lee, San Ramon, CA (US);

Ning Xue, Fremont, CA (US);

Tam Nguyen, San Jose, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/09 (2006.01);
U.S. Cl.
CPC ...
Abstract

A programmable logic integrated circuit device ('PLD') includes high-speed serial interface ('HSSI') circuitry that is at least partly hard-wired to perform at least some functional aspects of the HSSI operations. Cyclic redundancy check (CRC) generation and/or checking circuitry is now included in this HSSI circuitry, and again, this CRC circuitry is at least partly hard-wired to perform at least some functional aspects of its operations(s).


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