The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2009

Filed:

Feb. 16, 2006
Applicants:

Kendrick R. Bennett, Tewksbury, MA (US);

John H. Cafarella, Swampscott, MA (US);

Peter G. Johnson, Andover, MA (US);

Inventors:

Kendrick R. Bennett, Tewksbury, MA (US);

John H. Cafarella, Swampscott, MA (US);

Peter G. Johnson, Andover, MA (US);

Assignee:

Sifos Technologies, Inc., Tewksbury, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05D 3/12 (2006.01); G06F 1/00 (2006.01); G06F 1/26 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus for measuring characteristics of a at least one Power Over Ethernet (PoE) Power Sourcing Equipment (PSE) device (also referred to as a PSE test blade) is presented. The apparatus includes a port controller and a current loading circuit in communication with the port controller. The apparatus further includes a resistance loading circuit in communication with the port controller, a capacitance loading circuit in communication with the port controller, and a load current and voltage measuring circuit in communication with the port controller. The apparatus further includes a first network providing the power signals to at least one of the current loading circuit, the resistance loading circuit, the capacitance loading circuit, and the load current and voltage measuring circuit. The port controller utilizes a set of test primitives which are accessed in real time via a user interface to execute test sequences for characterizing PSE devices.


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