The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2009
Filed:
Dec. 11, 2002
Joern Naujokat, Freising, DE;
Joern Naujokat, Freising, DE;
Texas Instruments Deutschland GmbH, Freising, DE;
Abstract
A circuit assembly for converting a differential input clock signal pair into a single-ended output clock signal comprises a NMOS differential amplifier () including two N-channel field-effect transistors (N, N) which converts the input clock signal pair (CLK, NCLK) applied to its differential inputs into a first single-ended signal, a PMOS differential amplifier () including two P-channel field-effect transistors (P, P) which converts the input clock signal pair applied to its differential inputs into a second single-ended signal, a bias circuit (N, N, N, P, P) generating for each differential amplifier a bias voltage defining its working point at which said field-effect transistors (N, N; P, P) change state as a function of said input clock signal pair (CLK, NCLK), and a NAND circuit () for linking said first and said second single-ended signal and outputting the single-ended output clock signal (A-CLK) as the result thereof.