The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2009
Filed:
Nov. 14, 2007
Shawn Shaojie LI, Austin, TX (US);
Akhlesh Nigam, Austin, TX (US);
Mark R. Bohm, Village of Bear Creek, TX (US);
Michael J. Pennell, Phoenix, AZ (US);
Shawn Shaojie Li, Austin, TX (US);
Akhlesh Nigam, Austin, TX (US);
Mark R. Bohm, Village of Bear Creek, TX (US);
Michael J. Pennell, Phoenix, AZ (US);
Standard Microsystems Corporation, Hauppauge, NY (US);
Abstract
An Automatic System Clock Detection System (ASCDS) may provide integrated circuits (ICs) with the capability to detect the frequency of an external crystal oscillator or clock source, and adjust the IC's internal PLL accordingly for proper IC operation. The frequency detection and PLL adjustment may be performed without any additional pins on the IC, and/or without requiring any additional external information. The ASCDS may be configured with an internal ring oscillator, which may be generated from standard logic elements, a watchdog counter, and an input clock counter. When the IC comes out of power on reset (POR), the ASCDS may compare the input clock counter with the watchdog counter, and determine the clock frequency of the input clock. It may then set the PLL parameters to ensure correct IC operation.