The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2009
Filed:
Oct. 07, 2008
James C. Kemerling, Lewisville, NC (US);
David Ihme, Clemmons, NC (US);
William D. Cox, Chapel Hill, NC (US);
James C. Kemerling, Lewisville, NC (US);
David Ihme, Clemmons, NC (US);
William D. Cox, Chapel Hill, NC (US);
Triad Semiconductor, Inc., Winston-Salem, NC (US);
ViAsic, Inc., Durham, NC (US);
Abstract
A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include an interconnection quilt having a plurality of metal layers disposed to interconnect the plurality of circuit elements. The plurality of circuit elements may be analog circuit element and/or digital circuit elements. The tiles may be analog tiles and digital tiles that form a mixed signal structured array.