The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2009
Filed:
May. 22, 2007
Heinz Werker, Huglfing, DE;
Heinz Werker, Huglfing, DE;
National Semiconductor Germany AG, Unterhaching, DE;
Abstract
The invention relates to a phase locked loop or 'PLL' () and a method for the operation of a PLL (), wherein a controllable oscillator (DCO) generates an output signal (CKout) and can be switched over between a first clock signal (CKinor CKin) and a second clock signal (CKinor CKin) for use as the input clock signal of the PLL (). According to the invention, for the clock signal (CKinor CKin) currently being used to generate the output signal (CKout), a phase difference between this clock signal and the output signal (CKout) is determined and used for the control of the oscillator (DCO), whereas for the clock signal (CKinor CKin) currently not being used to generate the output signal (CKout), its frequency difference with respect to the output signal (CKout) is determined and stored and continuously updated and provided for the control of the oscillator (DCO) after the switch-over to this clock signal previously not being used. The PLL output signal (CKout) can thus follow more quickly any switch-over-related frequency change of the clock signal being used.