The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2009
Filed:
Jun. 28, 2005
Peng Su, Austin, TX (US);
Scott K. Pozder, Austin, TX (US);
David G. Wontor, Allen, TX (US);
Jie-hua Zhao, Austin, TX (US);
Peng Su, Austin, TX (US);
Scott K. Pozder, Austin, TX (US);
David G. Wontor, Allen, TX (US);
Jie-Hua Zhao, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A bump shear test is disclosed for evaluating the mechanical integrity of low-k interconnect stacks in an integrated circuit which includes a die test structure () having a stiff structural component () positioned above and affixed to a conductive metal pad () formed in a last metal layer (). The die test structure () may also include a dedicated support structure () below the conductive metal pad which includes a predetermined pattern of metal lines formed in the interconnect layers (). After mounting the integrated circuit in a test device, a shear knife () is positioned for lateral movement to cause the shear knife to contact the stiff structural component (). Any damage to the die test structure caused by the lateral movement of the shear knife may be assessed to evaluate the mechanical integrity of the interconnect stack.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile