The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2009
Filed:
Jan. 19, 2006
Dong Chen, Croton On Hudson, NY (US);
Alan Gara, Mount Kisco, NY (US);
Philip Heidelberger, Cortlandt Manor, NY (US);
Thomas Alan Liebsch, Rochester, MN (US);
Burkhard Steinmacher-burow, Baden-Wuerttemburg, DE;
Pavlos Michael Vranas, Bedford Hills, NY (US);
Dong Chen, Croton On Hudson, NY (US);
Alan Gara, Mount Kisco, NY (US);
Philip Heidelberger, Cortlandt Manor, NY (US);
Thomas Alan Liebsch, Rochester, MN (US);
Burkhard Steinmacher-Burow, Baden-Wuerttemburg, DE;
Pavlos Michael Vranas, Bedford Hills, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and apparatus for re-utilizing partially failed compute resources in a massively parallel super computer system. In the preferred embodiments the compute node comprises a number of clock domains that can be enabled separately. When an error in a compute node is detected, and the failure is not in network communication blocks, a clock enable circuit enables the clocks to the network communication blocks only to allow the partially failed compute node to be re-utilized as a network resource. The computer system can then continue to operate with only slightly diminished performance and thereby improve performance and perceived overall reliability.