The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2009
Filed:
Jan. 23, 2007
James B. Anderson, Santa Cruz, CA (US);
James B. Anderson, Santa Cruz, CA (US);
XILINX, Inc., San Jose, CA (US);
Abstract
Dynamic cache architecture for a multi-processor array. The system includes a plurality of processors, with at least one of the processors configured as a parent processor, and at least one of the processors configured as a child processor. A data cache is coupled to the parent processor, and a dual port memory is respectively associated with each child processor part and parcel of a unified memory architecture. The parent processor may then dynamically distribute sub-cache components to dual-port memories based upon a scatter-gather work unit decomposition pattern. A parent cache controller reads, in response to a memory request from a child processor and an address translation pattern from the parent processor, a set of data from non-contiguous addresses of the data cache according to the address translation pattern, and writes the set of data to contiguous addresses of the dual port memory associated with the requesting child processor.