The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2009
Filed:
Jul. 15, 2003
Martin Heinen, Bondorf, DE;
Joachim Moll, Herrenberg, DE;
Martin Heinen, Bondorf, DE;
Joachim Moll, Herrenberg, DE;
Agilent Technologies, Inc., Santa Clara, CA (US);
Abstract
An integrated circuit (), preferably a field programmable gate array—FPGA or an application specific integrated circuit—ASIC—, comprises a level comparator () for comparing a level of a comparator input signal and correspondingly providing a comparator output signal (COS). A sampling unit () is coupled to the level comparator () for sampling (SAM) the comparator output signal (COS). A bit error test unit () receives the sampled comparator output signal (SAM) and determine therefrom an indication of a bit error in a sequence of the sampled comparator output signal (SAM).