The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2009

Filed:

Nov. 08, 2004
Applicants:

Nicholas G. Cafaro, Coconut Creek, FL (US);

Thomas L. Gradishar, Boynton Beach, FL (US);

Robert E. Stengel, Pompano Beach, FL (US);

Inventors:

Nicholas G. Cafaro, Coconut Creek, FL (US);

Thomas L. Gradishar, Boynton Beach, FL (US);

Robert E. Stengel, Pompano Beach, FL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A DPC () includes: a frequency source () for generating a clock signal; a delay line () for receiving the clock signal and generating phase-shifted clock signals at output taps; a digital control device () for generating a control signal; and a windowing and selection circuit for generating the output signal, that includes sequential logic devices () and a combining network. A method for use in a DPC includes: receiving () a control signal based on a desired output signal that identifies a first output tap on the delay line; based on the control signal, selecting () at least two output taps on the delay line for receiving at least two different phase-shifted clock signals; and generating () an output signal based on the control signal and the received phase-shifted clock signals that is substantially the desired output signal.


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