The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2009
Filed:
Dec. 05, 2007
Yasuyuki Kajitani, Fujisawa, JP;
Yasuyuki Kajitani, Fujisawa, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A cell array selection circuit, a cell array bit line precharge circuit, and a sense amplifier bit line precharge circuit are provided in a semiconductor storage apparatus. In a standby state of read/write operation, the cell array selection circuit is controlled to an inactive state, and the bit line precharge circuits are controlled to an active state. In an active state of read/write operation, the cell array selection circuit to be selected is controlled to an active state, and the cell array bit line precharge circuit and the sense amplifier bit line precharge circuit are controlled to an inactive state. Cell array selection transistors, sense amplifier bit line precharge transistors, and control signals supplied to gate electrodes of the transistors are set in which change in potential provided on a cell array bit line pair when the states of the transistors change is cancelled.