The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2009

Filed:

Mar. 01, 2007
Applicants:

Kyoung Ho Kim, Hwasung-si, KR;

Seong Jin Jang, Seongnam-si, KR;

Inventors:

Kyoung Ho Kim, Hwasung-si, KR;

Seong Jin Jang, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit and method are provided for controlling the gate voltage of a transistor acting between local and global input/output lines of a memory device, the circuit including a local input/output line, a local from/to global input/output multiplexer in signal communication with the local input/output line, a global input/output line in signal communication with the local from/to global input/output multiplexer, and a local from/to global input/output controller having an input node and an output node, the input node disposed for receiving a signal indicative of an input or output operation, and the output node in signal communication with a gate of the local from/to global input/output multiplexer for providing a gate signal of a first or second level in the presence of the output operation, and a gate signal of a third level in the presence of the input operation.


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