The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2009

Filed:

Mar. 05, 2007
Applicants:

Shay Ping Seng, San Jose, CA (US);

William Edward Allaire, West Chester, PA (US);

Paul Travis Mobbs, San Francisco, CA (US);

Jing Zhao Ou, Sunnyvale, CA (US);

Inventors:

Shay Ping Seng, San Jose, CA (US);

William Edward Allaire, West Chester, PA (US);

Paul Travis Mobbs, San Francisco, CA (US);

Jing Zhao Ou, Sunnyvale, CA (US);

Assignee:

XILINX, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of implementing a circuit design on a programmable integrated circuit can include displaying a list of at least one memory of the circuit design that is associated with the processor. A plurality of attributes of an event for the processor can be received. The plurality of attributes can specify a condition that, when met within at least one memory from the list, causes a signal to be generated to the processor. A description of an event interface for the processor can be automatically created according to the plurality of attributes of the interrupt. The description of the event interface can be incorporated into a description of the circuit design.


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