The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2009

Filed:

Dec. 30, 2004
Applicants:

Sung-joo Ha, Ichon-shi, KR;

Ho-youb Cho, Ichon-shi, KR;

Inventors:

Sung-Joo Ha, Ichon-shi, KR;

Ho-Youb Cho, Ichon-shi, KR;

Assignee:

Hynix Semiconductor Inc., Ichon-shi, Kyoungki-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device resolves skew problem due to delay difference between the case when data that is inputted through data input/output (IO) pin is transferred to one global I/O bus and the case when transferred to another global I/O bus based on data width option. The semiconductor memory device includes a first data IO pad formed at one side of a chip, a second data IO pad formed at the other one, a first global data bus receiving data from the first data IO pad, a second global data bus receiving data from the second data IO pad, a first data path for transferring data from the first data IO pad to the first global data bus, a second data path for transferring data from the first data IO pad to the second global data bus, and a third data path for transferring data inputted to the second data IO pad to the first global data bus depending on data width option, wherein data transfer time of the second data path is substantially equal to data transfer time of the third data path.


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