The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2009

Filed:

Jun. 23, 2006
Applicants:

Joo-ho Lee, Seoul, KR;

Hae-seok Park, Yongin-si, KR;

Byeoung-ju Ha, Seongnam-si, KR;

Seog-woo Hong, Yongin-si, KR;

Hyung Choi, Seongnam-si, KR;

In-sang Song, Seoul, KR;

Inventors:

Joo-ho Lee, Seoul, KR;

Hae-seok Park, Yongin-si, KR;

Byeoung-ju Ha, Seongnam-si, KR;

Seog-woo Hong, Yongin-si, KR;

Hyung Choi, Seongnam-si, KR;

In-sang Song, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An inductor integrated chip and fabrication method thereof is provided. The inductor integrated chip includes a wafer; an inductor bonded on a surface of the wafer; a circuit element formed on the surface of the wafer and coupled to a first end of the inductor; a packaging wafer connected to the surface of the wafer and packaging the inductor and the circuit element; and a connecting electrode formed on the packaging wafer and connected to a second end of the inductor. The method includes forming an inductor and a circuit element on a surface of a wafer, wherein the circuit element is coupled to a first end of the inductor; forming a connecting electrode on a packaging wafer; and packaging the inductor and the circuit element by joining the wafer and the packaging wafer so as to connect the connecting electrode with a second end of the inductor.


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