The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2009
Filed:
Mar. 30, 2007
Donald E. Alfano, Round Rock, TX (US);
Danny J. Allred, Austin, TX (US);
Douglas S. Piasecki, Austin, TX (US);
Kenneth W. Fernald, Austin, TX (US);
Ka Y. Leung, Austin, TX (US);
Brian Caloway, Georgetown, TX (US);
Alvin Storvik, Austin, TX (US);
Paul Highley, Austin, TX (US);
Douglas R. Holberg, Wimberley, TX (US);
Donald E. Alfano, Round Rock, TX (US);
Danny J. Allred, Austin, TX (US);
Douglas S. Piasecki, Austin, TX (US);
Kenneth W. Fernald, Austin, TX (US);
Ka Y. Leung, Austin, TX (US);
Brian Caloway, Georgetown, TX (US);
Alvin Storvik, Austin, TX (US);
Paul Highley, Austin, TX (US);
Douglas R. Holberg, Wimberley, TX (US);
Silicon Labs CP, Inc., Austin, TX (US);
Abstract
An integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A plurality of comparators perform compare operations within the integrated circuit package. At least one control register is associated with each of the plurality of comparators, and each of the plurality of comparators are software programmable to control a hysteresis of the comparators responsive to control bits established in the at least one control register of the comparator by the processing core. An amount of positive hysteresis is programmed via a first group of the control bits and an amount of negative hysteresis is programmed via a second group of the control bits.