The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2009

Filed:

Apr. 23, 2007
Applicants:

Hiroaki Nakano, Yokohama, JP;

Toshimasa Namekawa, Tokyo, JP;

Hiroshi Ito, Yokohama, JP;

Osamu Wada, Yokohama, JP;

Atsushi Nakayama, Yokohama, JP;

Inventors:

Hiroaki Nakano, Yokohama, JP;

Toshimasa Namekawa, Tokyo, JP;

Hiroshi Ito, Yokohama, JP;

Osamu Wada, Yokohama, JP;

Atsushi Nakayama, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 17/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device includes a memory element, a first data line and a second data line, a first selection transistor, and a second selection transistor. The memory element includes a semiconductor element of MOS structure in which data is programmed when an insulating film provided in the semiconductor element is broken down by application of a voltage thereto. The first and second data lines are connected to a sense amplifier. The first selection transistor is configured to connect the memory element to the first data line in order to program data in the memory element. The second selection transistor is configured to connect the memory element to the second data line in order to program data in the memory element and detect the data programmed in the memory element. The second selection transistor has a smaller gate-electrode width smaller than the first selection transistor.


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