The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2009

Filed:

Mar. 01, 2008
Applicants:

Rajasekhar Pullela, Colton, CA (US);

Morten Damgaard, Laguna Hills, CA (US);

Shahrzad Tadjpour, Irvine, CA (US);

John E. Vasa, Irvine, CA (US);

Hoon Lee, Irvine, CA (US);

Inventors:

Rajasekhar Pullela, Colton, CA (US);

Morten Damgaard, Laguna Hills, CA (US);

Shahrzad Tadjpour, Irvine, CA (US);

John E. Vasa, Irvine, CA (US);

Hoon Lee, Irvine, CA (US);

Assignee:

Skyworks Solutions, Inc., Woburn, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); H03L 7/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

A phase-locked loop (PLL) is arranged to receive high-pass data at a first input and low-pass data at a second input. A first digital input is coupled to a primary path through a digital-to-analog converter (DAC) and a second digital input is coupled to a feedback path of the PLL. The controller provides the first input and the second input during a calibration procedure. The controller adjusts first and second control inputs in an attempt to keep the input voltage to a voltage-controlled oscillator (VCO) in the PLL constant while determining the gain of the VCO in Hz/LSB.


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