The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2009

Filed:

Mar. 14, 2005
Applicants:

Keisuke Korekado, Fukuoka-ken, JP;

Osamu Nomura, Fukuoka-ken, JP;

Atsushi Iwata, Hiroshima-ken, JP;

Takashi Morie, Hiroshima-ken, JP;

Inventors:

Keisuke Korekado, Fukuoka-ken, JP;

Osamu Nomura, Fukuoka-ken, JP;

Atsushi Iwata, Hiroshima-ken, JP;

Takashi Morie, Hiroshima-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06G 7/00 (2006.01); G06G 7/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

An arithmetic circuit to calculate a cumulative value of results of parallel arithmetic processing, in which the increase of the circuit area for multiple-term arithmetic computation and the degradation of accuracy of holding of computation results in a short time can be prevented. The arithmetic circuit has plural analog arithmetic circuits to perform arithmetic processing based on input analog signals, a capacitor to hold a charge amount proportional to a total sum of results of computations by the plural analog arithmetic circuits, an analog-to-digital (A/D) conversion circuit to convert the charge amount stored in the capacitor to digital data, and a digital arithmetic circuit to calculate a cumulative value based on the converted digital data.


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