The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2009
Filed:
Oct. 05, 2004
James W. Cady, Austin, TX (US);
James Wilder, Austin, TX (US);
David L. Roper, Austin, TX (US);
Russell Rapport, Austin, TX (US);
James Douglas Wehrly, Jr., Austin, TX (US);
Jeffrey Alan Buchle, Austin, TX (US);
James W. Cady, Austin, TX (US);
James Wilder, Austin, TX (US);
David L. Roper, Austin, TX (US);
Russell Rapport, Austin, TX (US);
James Douglas Wehrly, Jr., Austin, TX (US);
Jeffrey Alan Buchle, Austin, TX (US);
Enthorian Technologies, LP, Austin, TX (US);
Abstract
The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP integrated circuit and a support element CSP integrated circuit are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements. A portion of the flex circuit connected to the support element is folded over the base element to dispose the support element above the base element while reducing the overall footprint. The flex circuit provides a thermal and electrical connection path between the module and an application environment such as a printed wiring board (PWB).