The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2009

Filed:

May. 25, 2007
Applicants:

Mark Chambers, Laguna Hills, CA (US);

Natarajan Ramachandran, Huntingdon Beach, CA (US);

Karapet Khanoyan, Lake Forest, CA (US);

Tong Zhu, Irvine, CA (US);

Inventors:

Mark Chambers, Laguna Hills, CA (US);

Natarajan Ramachandran, Huntingdon Beach, CA (US);

Karapet Khanoyan, Lake Forest, CA (US);

Tong Zhu, Irvine, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/18 (2006.01); H03L 7/197 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus and method is disclosed to substantially reduce phase noise introduced in fractional-N phase-locked loop (PLL) through feedback modulation. A fractional frequency divider is introduced in the feedback path of the PLL to generate a true fractional division factor with finite fractional steps to increase the resolution of the PLL by a factor equal to the inverse of the finite step size in the fractional frequency divider. Increasing the resolution of the PLL reduces phase noise. The fractional frequency divider uses the true fractional division factor to divide the frequency of a single output of a multi-phased voltage controlled oscillator (VCO) by the fractional division factor to match the frequency of the divided feedback signal to frequency a reference signal. The fractional frequency divider incrementally selects among all the outputs of the multi-phased VCO according to either a forward phase shifting operation or a backward phase shifting operation to generate a true fractional division factor.


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