The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2009
Filed:
Feb. 12, 2008
Masaki Sano, Kanagawa, JP;
Masaki Sano, Kanagawa, JP;
NEC Electronics Corporation, Kawasaki, Kanagawa, JP;
Abstract
A PLL circuit includes a polyphase reference clock output circuit, which outputs multiple reference clocks, each clock being of different phase. The PLL circuit further includes a digital voltage controlled oscillator, which, using any one of the multiple reference clocks chosen as an operating clock, outputs an output clock whose frequency varies according to a value of a frequency control signal, and which outputs a delay amount data representing a phase difference between the phase of the output clock and an ideal phase gained by computing based on the value of the frequency control signal. The PLL circuit further includes a selection circuit which is responsive to the delay amount data to select and output the output clock synchronized with one of the multiple reference clocks.