The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2009

Filed:

Jul. 03, 2007
Applicants:

Toshinobu Nagasawa, Osaka, JP;

Taku Kobayashi, Kyoto, JP;

Tetsushi Toyooka, Kyoto, JP;

Keiichi Fujii, Shiga, JP;

Inventors:

Toshinobu Nagasawa, Osaka, JP;

Taku Kobayashi, Kyoto, JP;

Tetsushi Toyooka, Kyoto, JP;

Keiichi Fujii, Shiga, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01); G05F 3/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor integrated circuit that suppresses steep changes of an output voltage when starting of a charge pump circuit to suppress transient displacement of output of a circuit block operating independently of the charge pump circuit is provided. A semiconductor integrated circuit has: a charge pump circuit which charges a first capacitor with an input voltage, transfers a charge accumulated in the first capacitor to a second capacitor, outputs, as an output voltage, a voltage of the second capacitor, and is capable of changing over a capability of charging the second capacitor; a first circuit block that receives a positive voltage and a grounding potential; and a second circuit block that receives the positive voltage and the output voltage of the charge pump. The semiconductor integrated circuit suppresses the charging capability by the charge pump circuit when starting of the charge pump circuit.


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