The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2009

Filed:

May. 17, 2007
Applicants:

Tung-chen Kuo, Hsin-Chu, TW;

Kuen-bin Lai, Hsin-Chu, TW;

Inventors:

Tung-Chen Kuo, Hsin-Chu, TW;

Kuen-Bin Lai, Hsin-Chu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is an adjusting circuit for determining a target delay clock signal of a delay circuit having a plurality of delay units. The delay circuit generates a plurality of delay clock signals, and the adjusting circuit includes: a difference signal generating circuit, for generating a plurality of difference signals according to a reference clock signal and the delay clock signals; a delay processing circuit, coupled to the difference signal generating circuit, for determining the target delay clock signal by computing a corresponding number of delay units for a specific phase of the reference clock signal according to the difference signals; wherein the target delay clock signal is one of the delay clock signals.


Find Patent Forward Citations

Kuo, Tung-Chen. (2009). Adjusting circuit and method for delay circuit (U.S. Patent No. 7605629). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7605629

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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