The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2009
Filed:
Jun. 03, 2005
Matthieu P. H. Cossoul, Sunnyvale, CA (US);
Madabhushi V. R. Chari, San Jose, CA (US);
Matthieu P. H. Cossoul, Sunnyvale, CA (US);
Madabhushi V. R. Chari, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Testing of routing resources in a path between network nodes is provided using simpler nodes to replace more complex IP modules which could be programmed into an FPGA after the routing resources are tested. Further, when it is impractical to generate a pattern from a source node S for testing a network path N to a load, subnetworks are created to perform testing. To provide the subnetworks, a source S' is first provided close to node S that generates signal patterns to route through a path N′ to load L. When it is impractical to test a network path N from source to load L, a load L′ is further provided close to load L that receives the signal patterns from a routing path N″ provided from source S. The paths N′ and N″ overlap to cover all the routing resources of the path N.