Reference clock signal generation circuit, power supply circuit, driver circuit, and electro-optical device

Abstract

A reference clock signal generation circuit for generating a reference clock signal for a charge-pump operation which raises or lowers a voltage includes a clock signal generation circuit which generates a reference clock signal having one of first to nth (n is an integer of two or more) frequencies, a wait time setting register in which a value corresponding to a wait time is set, and a frequency setting register in which a value corresponding to one of the first to nth frequencies is set. The clock signal generation circuit generates the reference clock signal having a predetermined frequency in a start period from start of the charge-pump operation to completion of the wait time, and generates the reference clock signal having a frequency corresponding to the value set in the frequency setting register in an operation period after the start period.