The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2009
Filed:
Oct. 12, 2005
Andrew G. Deczky, Ottawa, CA;
Andrew G. Deczky, Ottawa, CA;
Ciena Corporation, Linthicum, MD (US);
Abstract
The present invention provides procedures for computing Forward Error Correction (FEC) parameters given a set of constraints on maximum interleaver memory, maximum interleaver depth, maximum codeword size, maximum number of check bytes, maximum number of FEC codewords per Discrete Multi-Tone (DMT) symbol, and minimum number of DMT symbols that the FEC must correct, as well as any constraints imposed by the interleaver. These procedures are implemented on a computational engine in a modem, enabling it to achieve optimal performance in all cases. In addition these procedures can be applied as part of any bit loading algorithm to determine the optimal FEC parameters, taking into account the Signal-to-Noise Ratio (SNR) profile, the FEC coding gain, the constraints of the framer, and any application specific constraints.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile