The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2009

Filed:

May. 22, 2007
Applicants:

Gurjit S. Thandi, San Jose, CA (US);

Dilip S, Saratoga, CA (US);

Hendrik Santo, San Jose, CA (US);

Kien Vi, Palo Alto, CA (US);

Inventors:

Gurjit S. Thandi, San Jose, CA (US);

Dilip S, Saratoga, CA (US);

Hendrik Santo, San Jose, CA (US);

Kien Vi, Palo Alto, CA (US);

Assignee:

mSilica Inc, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention uses two transistors instead of a sensing resistor to provide a constant current source for a load such as an array of light emitting diodes ('LEDs'). In the present invention, a bias current is applied to a branch of the circuit. The drain-to-source voltages of two transistors are matched. The voltage at the gate of both transistors is controlled based on the bias current and the drain-to-source current of the first of the two transistors. The second of the two transistors is sized such that source current of the second transistor is a multiple of the source current of the first transistor for a given gate voltage. By the techniques of this invention, the load current in a circuit is efficiently kept constant at a multiple of the input bias current.


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